1. Field of the Invention
This invention relates generally to data processing systems, and more particularly, to a method and apparatus for transmitting an accurate data group from an execution unit control store to the instruction buffer of a central processing unit by means of two, three-state data busses.
2. Description of the Prior Art
In data processing systems wherein various subsystems must communicate with each other, errors, for example those caused by the presence of noise, sometimes result in the receipt of data which is not the same as that which was transmitted. Specifically, data processing systems generally employ, as a means of communication, signals corresponding to a high level and a low level state, often referred to as logic states "1" and "0" respectively. Noise or equipment faults may cause receipt of a "1" or "0" when in fact a "0" or "1", respectively, has been transmitted.
A data group or word consists of a plurality of 1s and 0s. For example, the code group 101 may correctly represent the quantity 5. If an error is introduced during transmission, the code group may be received as the binary code 100, corresponding to the quantity 4. While well known parity checking techniques provide a convenient means for detecting an error in a single bit, such a parity check fails if two bits are in error. Cyclic codes were developed and represent a marked improvement over the parity approach in that multiple errors can be detected. A detailed treatment of error correction techniques may be found in Hamming, "Error Detecting and Error Correcting Codes" Bell System Technical Journal, Volume 29, 1950, pages 147-160. The application of Hamming's work permitted the detection and correction of randomly occurring errors within a single bit of received code word.
It is well known to employ error detection and correction (EDAC) apparatus to check and correct data extracted from a main memory system and bound for other subsystems in the data processing systems, for example, the central processing unit. However, in the past, such apparatus was not employed to verify the correct microinstructions from the instruction unit control store to an execution buffer, the process would simply be aborted and re-executed since it was generally felt that the error was the result of a transient transmission problem.